I’m working on a electrical engineering project and need support to help me learn.
I need to help with part 1,2,3 of this project. Explain your findings and answers for each project tasks. Please also attach the Cadence Virtuoso screen snapshots in your report to prove that you have done the required simulations.THE MOSFET I USE IS AMI 0.6µm in from the NCSU kit CMOS models installed in the Volta server.

Requirements: medium   |   .doc file

VLSI Circuit Design: Design and Implement a 2-input NAND and a 2-input NOR gate on Cadence Virtuoso